Conventionally, image displays, such as active matrix liquid crystal displays using thin film transistors (TFTs) as pixel switching elements (hereinafter, “switching elements”), are in widespread use: the liquid crystal display (TFT-LCD) is an example. The liquid crystal display (LCD) in recent years has also found applications in personal digital assistants (PDAs), mobile phones, and like devices.
A conventional liquid crystal display is made up of pixel electrodes each provided for a different pixel on a substrate; switching elements connected to the pixel electrodes; scan lines for applying scan line voltages to the switching elements to switch the switching elements between on state and off state; signal lines for applying signal line voltages via the switching elements to the pixel electrodes; and common electrodes for applying common voltages to the pixels interposed between the pixel electrodes and the common electrodes.
In the structure, each transistor, acting as one of the switching elements, is connected at its gate to a scan line, at its source to a signal line, and at its drain to a pixel electrode. When a scan line voltage is applied to the gate and the switching element is in on state, the signal line voltage is applied to the pixel electrode via the resistor of the switching element, and a common voltage is applied to the common electrode. Consequently, the potential difference between the pixel electrode and the common electrode charges the pixel.
Note that the foregoing pixel, that is, liquid crystal, is a dielectric. Therefore, when a voltage is applied, the pixel electrode, the common electrode, and the pixel behave as a capacitor. Therefore, applying a voltage to that capacitor results in the pixel between the pixel electrode and the common electrode being charged according to the application voltage and the application time.
Also note that applying DC voltage across the pixel, that is, liquid crystal, degrades the liquid crystal, and to avoid that problem, AC voltage is applied in normal cases. Hereinafter, those cases in which, of AC voltages applied to the pixel, a positive voltage is being applied to the pixel as the difference between the signal line voltage and the common voltage will be referred to as positive polarity writing. Conversely, those cases in which a negative voltage is being applied to the pixel as the difference between the signal line voltage and the common voltage will be referred to as negative polarity writing.
In the structure, the liquid crystal display displays an image by applying signal line voltages having values associated with pixel data. The liquid crystal display is then adapted to repeat the foregoing action sequentially for one pixel after the other, covering the entire liquid crystal screen, so as to display an image.
Note that a conventional liquid crystal display employed the following drive method to display good tones.
The timing chart in FIG. 13 shows changes of the signal line voltage with time in the liquid crystal display. Time is represented by the horizontal axis, and the signal line voltage is represented by the vertical axis. A horizontal period in the figure refers to a duration in which on state is maintained by the application of scan line voltage (not shown).
Such a driving method like the one shown in FIG. 13 whereby the pixel application voltage value is varied by changing the signal line voltage value will be referred to as voltage modulation drive. By changing the signal line voltage value, the voltage modulation drive is capable of altering the pixel application voltage value and hence displaying tones according to the voltage values.
Switching elements used in the voltage modulation drive are designed so that they are capable of sufficiently writing signal line voltage to pixel electrodes, that is, they can achieve an almost 100% charge ratio (typically 99% or greater).
A charge ratio is a value indicative of a ratio of the signal line voltage applied to a signal line and the voltage written to a capacitor containing a pixel. If a voltage is applied to a pixel, the voltage written to the pixel gradually approaches with time the signal line voltage supplied to the signal line.
However, the voltage modulation drive is designed to use a predetermined circuit to produce a signal line voltage (tone voltage) having a desired value for application to a signal line. A problem arises here that the tone voltage producing circuit consumes electric power.
In contrast, further reductions in power consumption are required with personal digital assistants, mobile phones, and like devices which recently incorporate liquid crystal displays. Additional power consumption for tone voltage production as is the case with the voltage modulation drive is very problematic.
Accordingly, apart from the voltage modulation drive, pulse width modulation drive is suggested which necessitates no tone voltage producing circuit and supplies only an externally provided reference voltage to signal lines. Details follow.
FIG. 14 is a timing chart showing changes of the signal line voltage with time according pulse width modulation drive. The vertical and horizontal axes, as well as the horizontal period, in FIG. 14 have the same meaning as those in FIG. 13. In pulse width modulation drive, a change of the signal line voltage does not necessarily coincide with a change of the scan line voltage (not shown).
As shown in FIG. 14, the drive method adjusts the duration in which a signal line voltage is applied, so as to change the voltage written to pixels. As an alternative to the scheme shown in FIG. 14, the duration in which to apply a signal line voltage can be adjusted also by offsetting the time at which to change the signal line voltage and the time at which to change the scan line voltage (not shown). The alternative scheme is possible because voltage can be applied to pixels only when the scan line voltage is being in on state, and if the times are offset as in the foregoing, pixels are charged only in an on state.
Therefore, by changing the duration (pulse width) in which to apply a signal line voltage in on state, the voltage written to a pixel can be changed, and tones can be produced.
The pulse width modulation drive eliminates the need to change the value of the signal line voltage applied to a signal line to display tones. Accordingly, no tone voltage producing circuit is necessary, and power is saved as much as the amount consumed by that circuit. Further, since it is not necessary to provide a buffer for every signal line output, no power consumption could occur in the buffer. Accordingly, power consumption in the pulse width modulation is reduced compared to that of voltage modulation drive.
As an example of the drive method, Japanese Unexamined Patent Applications 55-140889/1980 (Tokukaisho 55-140889; published on Nov. 4, 1980) and 3-62094/1991 (Tokukaihei 3-62094; published on Mar. 18, 1991) disclose pulse width modulation drive based on two-value signal line voltage.
The drive method disclosed in these Applications is actually used in, for example, liquid crystal displays incorporating two-terminal MIM elements (metal-insulator-metal multilayer elements) as switching elements (MIM-LCD).
Further, for example, Japanese Unexamined Patent Application 11-326870/1999 (Tokukaihei 11-326870; published on Nov. 26, 1999) discloses a liquid crystal display incorporating MIM elements as switching elements for use in PDAs.
However, use of the conventional pulse width modulation drive has following problems.
To produce good multiple tones using a liquid crystal display, the value of the voltage written to every pixel needs to be adjusted in multiple stages in the first place. To adjust the voltage value in multiple stages by pulse width modulation drive, the duration in which a signal line voltage in an on state is applied, that is, the pulse width, is adjusted.
FIG. 15 is a timing chart showing changes of the scan line voltage, the signal line voltage, and the common voltage on a signal line with time. “Vgn−1” and “Vgn” represent scan line voltages applied to (n−1)-th and n-th scan lines respectively, “SOURCE” the signal line voltage, and “com” the common voltage. As shown in the figure, the on-state scan line voltage is +10 V.
In the period X in FIG. 15 in which only positive polarity writing is performed, the scan line voltage on the (n−1)-th scan line is +10 V and therefore on state, and the difference between the signal line voltage and the common voltage, 5 V-(−1 V)=6 V. is applied to the pixel located where the aforementioned signal line meets the (n−1)-th scan line.
Note that the signal line voltage is +5 V, whereas the scan line voltage is +10 V. Therefore, in positive polarity writing, the difference between the scan line voltage and the signal line voltage is +5 V.
In contrast, in the period Y in FIG. 15 in which only negative polarity writing is performed, the scan line voltage on the n-th scan line is +10 V and on state, and the difference between the signal line voltage and the common voltage, 0 V-(5 V)=−5 V, is applied to the pixel on the n-th scan line.
Note that the signal line voltage is 0 V, whereas the scan line voltage is +10 V. Therefore, in negative polarity writing, the difference between the scan line voltage and the signal line voltage is +10 V.
As described in the foregoing, in the conventional image display, the difference between the scan line voltage and the signal line voltage, that is, the difference between the voltages applied to the gate and the source of the pixel switching element, is made to differ between positive polarity writing and negative polarity writing.
As a result, the on-resistance of the transistor differs between positive polarity writing and negative polarity writing. Therefore, the current flow through the transistor also differs between positive polarity writing and negative polarity writing. As a result, different pulse widths are used upon writing between positive polarity writing and negative polarity writing.
Note that an “on-resistance” is a value indicating the current supply capability of a transistor and has such a property that it decreases progressively in value as the difference between the voltage applied to the pixel (source voltage) and the gate voltage grows.
Under such circumstances, to produce a precise tone display both by positive polarity writing and by negative polarity writing, the maximum pulse width, the size of the switching element, etc. should be determined first in accordance with positive polarity writing whereby the switching element has a higher resistance value, and a high frequency clock is necessary to produce subtle differences of the charge ratio in negative polarity writing whereby the switching element has a lower resistance value. As a result, an inevitable problem arises that power consumption grows.